Optimal power control in green wireless sensor networks with wireless energy harvesting, wake-up radio and transmission control

Wireless sensor networks (WSNs) are autonomous networks of spatially distributed sensor nodes which are capable of wirelessly communicating with each other in a multi-hop fashion. Among different metrics, network lifetime and utility and energy consumption in terms of carbon footprint are key parameters that determine the performance of such a network and entail a sophisticated design at different abstraction levels. In this paper, wireless energy harvesting (WEH), wake-up radio (WUR) scheme and error control coding (ECC) are investigated as enabling solutions to enhance the performance of WSNs while reducing its carbon footprint. Specifically, a utility-lifetime maximization problem incorporating WEH, WUR and ECC, is formulated and solved using distributed dual subgradient algorithm based on Lagrange multiplier method. It is discussed and verified through simulation results to show how the proposed solutions improve network utility, prolong the lifetime and pave the way for a greener WSN by reducing its carbon footprint

Wireless energy harvesting for Internet of Things

Internet of Things (IoT) is an emerging computing concept that describes a structure in which everyday physical objects, each provided with unique identifiers, are connected to the Internet without requiring human interaction. Long-term and self-sustainable operation are key components for realization of such a complex network, and entail energy-aware devices that are potentially capable of harvesting their required energy from ambient sources. Among different energy harvesting methods such as vibration, light and thermal energy extraction, wireless energy harvesting (WEH) has proven to be one of the most promising solutions by virtue of its simplicity, ease of implementation and availability. In this article, we present an overview of enabling technologies for efficient WEH, analyze the life-time of WEH-enabled IoT devices, and briefly study the future trends in the design of efficient WEH systems and research challenges that lie ahead

Efficient power and data converter circuits for RFID applications

The basic concept of radio-frequency identification (RFID) as a means of wireless identification of physical objects has existed for over half a century. However, the technology became economically feasible during the mid-90s mainly due to proliferation of low-cost integrated circuits. Since its emergence, RFID technology has gained extensive attraction and has been used in numerous industrial applications. To facilitate widespread deployment, RFID tags as the backbone of such identification systems have to fulfil two general requirements, namely, low power consumption and small form factor. In this thesis, with an emphasis on power and area efficient architectures, efficient data and power converters as the two major building blocks of sensor-enabled RFID tags are investigated. In the context of data conversion, by using two low-power analog buffers instead of the conventional binary weighted capacitive array, a low-power 8-bit successive-approximation register (SAR) analog-to-digital converter (ADC) with an area efficient digital-to-analog converter (DAC) architecture is proposed. Furthermore, time-mode ADC as an alternative area and power-efficient structure is discussed and a highly linear, wide-input-range voltage-to-time converter (VTC) is presented and experimentally evaluated. In the context of efficient power converters, through optimizing the bias voltage of the gate of switching transistors in a conventional differential rectifier, three high-efficiency RF rectifier architectures, namely, gate-boosted, auxiliary-cell biased, and quasi-floating-gate (QFG)-biased rectifiers are proposed. Furthermore, through dynamically adjusting the input capacitance, a dual-band matching approach for RF rectifiers is presented. The proposed QFG-biased rectifier is incorporated and analyzed in a wake-up radio front-end. Also, backscattering method as a power efficient scheme during the transmit mode is studied in the context of biomedical implants. Furthermore, based on the techniques developed for enhancing the efficiency of the rectifier, an ultra-low-power complementary metal-oxide-semiconductor ( CMOS ) voltage-controlled ring oscillator architecture is proposed. The proposed building blocks and systems, namely, ADC, rectifiers, wake-up radio structure, and voltage-controlled ring-oscillator architecture are designed in a 0.13-µm CMOS technology and their performances are verified through post-layout simulation and/or measurement results.Applied Science, Faculty ofElectrical and Computer Engineering, Department ofGraduat

A high-sensitivity fully passive wake-up radio front-end for wireless sensor nodes

A high-sensitivity fully passive 868-MHz wake-up radio (WUR) front-end for wireless sensor network nodes is presented. The front-end does not have an external power source and extracts the entire energy from the radio-frequency (RF) signal received at the antenna. A high-efficiency differential RF-to-DC converter rectifies the incident RF signal and drives the circuit blocks including a low-power comparator and reference generators; and at the same time detects the envelope of the on-off keying (OOK) wake-up signal. The front-end is designed and simulated 0.13\u3bcm CMOS and achieves a sensitivity of -33 dBm for a 100 kbps wake-up signal